chore(interpreter): rename Operand -> ArithmeticOperand
This commit is contained in:
@@ -6,7 +6,7 @@ use super::{flags::Flags, interpreter::InterpreterError, memory::Memory, registe
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/// Wrapper for easier argument passing of polymorph arithmetic operations.
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/// Wrapper for easier argument passing of polymorph arithmetic operations.
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#[derive(Debug, Clone)]
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#[derive(Debug, Clone)]
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pub enum Operand {
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pub enum ArithmeticOperand {
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Immediate(crate::operands::ImmediateOperand),
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Immediate(crate::operands::ImmediateOperand),
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ModRmTarget(ModRmTarget),
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ModRmTarget(ModRmTarget),
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}
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}
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@@ -61,7 +61,7 @@ impl Computer {
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}
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}
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/// Perform binary `dest` = `dest` + `src`. Sets flags.
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/// Perform binary `dest` = `dest` + `src`. Sets flags.
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pub fn add(&mut self, dest: ModRmTarget, src: Operand) {
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pub fn add(&mut self, dest: ModRmTarget, src: ArithmeticOperand) {
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs + rhs;
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs + rhs;
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, lhs, rhs| {
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, lhs, rhs| {
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flags.cf = result < rhs;
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flags.cf = result < rhs;
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@@ -74,7 +74,7 @@ impl Computer {
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}
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}
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/// Perform binary `dest` = `dest` - `src`. Sets flags.
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/// Perform binary `dest` = `dest` - `src`. Sets flags.
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pub fn sub(&mut self, dest: ModRmTarget, src: Operand) {
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pub fn sub(&mut self, dest: ModRmTarget, src: ArithmeticOperand) {
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs - rhs;
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs - rhs;
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, lhs, rhs| {
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, lhs, rhs| {
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flags.cf = lhs < rhs;
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flags.cf = lhs < rhs;
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@@ -87,7 +87,7 @@ impl Computer {
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}
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}
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/// Perform binary `dest` = `dest` | `src`. Sets flags.
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/// Perform binary `dest` = `dest` | `src`. Sets flags.
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pub fn or(&mut self, dest: ModRmTarget, src: Operand) {
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pub fn or(&mut self, dest: ModRmTarget, src: ArithmeticOperand) {
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs | rhs;
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs | rhs;
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, _, _| {
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, _, _| {
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flags.cf = false;
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flags.cf = false;
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@@ -100,7 +100,7 @@ impl Computer {
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}
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}
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/// Perform binary `dest` = `dest` & `src`. Sets flags.
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/// Perform binary `dest` = `dest` & `src`. Sets flags.
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pub fn and(&mut self, dest: ModRmTarget, src: Operand) {
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pub fn and(&mut self, dest: ModRmTarget, src: ArithmeticOperand) {
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs & rhs;
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs & rhs;
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, _, _rhs| {
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, _, _rhs| {
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flags.cf = false;
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flags.cf = false;
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@@ -113,7 +113,7 @@ impl Computer {
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}
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}
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/// Perform binary `dest` = `dest` ^ `src`. Sets flags.
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/// Perform binary `dest` = `dest` ^ `src`. Sets flags.
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pub fn xor(&mut self, dest: ModRmTarget, src: Operand) {
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pub fn xor(&mut self, dest: ModRmTarget, src: ArithmeticOperand) {
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs ^ rhs;
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs ^ rhs;
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, _, _| {
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, _, _| {
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flags.cf = false;
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flags.cf = false;
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@@ -127,7 +127,7 @@ impl Computer {
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/// Perform compare operation, which acts like [`Self::sub()`], but without
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/// Perform compare operation, which acts like [`Self::sub()`], but without
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/// saving the result and only setting [`Self::flags`].
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/// saving the result and only setting [`Self::flags`].
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pub fn cmp(&mut self, dest: ModRmTarget, src: Operand) {
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pub fn cmp(&mut self, dest: ModRmTarget, src: ArithmeticOperand) {
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs - rhs;
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs - rhs;
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, lhs, rhs| {
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, lhs, rhs| {
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flags.cf = lhs < rhs;
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flags.cf = lhs < rhs;
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@@ -141,7 +141,7 @@ impl Computer {
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/// Perform test operation, which acts like [`Self::and()`], but without
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/// Perform test operation, which acts like [`Self::and()`], but without
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/// saving the result and only setting [`Self::flags`].
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/// saving the result and only setting [`Self::flags`].
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pub fn test(&mut self, dest: ModRmTarget, src: Operand) {
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pub fn test(&mut self, dest: ModRmTarget, src: ArithmeticOperand) {
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs & rhs;
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs & rhs;
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, _, _| {
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, _, _| {
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flags.cf = false;
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flags.cf = false;
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@@ -154,15 +154,19 @@ impl Computer {
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}
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}
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/// Perform `dest` = `dest` + `src` + CF. Sets flags.
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/// Perform `dest` = `dest` + `src` + CF. Sets flags.
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pub fn adc(&mut self, dest: ModRmTarget, src: Operand) {
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pub fn adc(&mut self, dest: ModRmTarget, src: ArithmeticOperand) {
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let cf = self.flags.cf as u8;
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let cf = self.flags.cf as u8;
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// cheating, by flattening into immediates, but this allows to easily add the opt. carry
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// cheating, by flattening into immediates, but this allows to easily add the opt. carry
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let src_with_carry = match src {
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let src_with_carry = match src {
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Operand::Immediate(immediate_operand) => Operand::Immediate(immediate_operand + cf),
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ArithmeticOperand::Immediate(immediate_operand) => {
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Operand::ModRmTarget(mod_rm_target) => Operand::Immediate(match mod_rm_target {
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ArithmeticOperand::Immediate(immediate_operand + cf)
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ModRmTarget::Memory(idx) => self.memory.read(&self.regs, idx) + cf,
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}
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ModRmTarget::Register(reg) => self.regs.read(reg) + cf,
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ArithmeticOperand::ModRmTarget(mod_rm_target) => {
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}),
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ArithmeticOperand::Immediate(match mod_rm_target {
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ModRmTarget::Memory(idx) => self.memory.read(&self.regs, idx) + cf,
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ModRmTarget::Register(reg) => self.regs.read(reg) + cf,
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})
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}
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};
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};
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs + rhs;
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs + rhs;
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, lhs, rhs| {
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, lhs, rhs| {
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@@ -176,15 +180,19 @@ impl Computer {
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}
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}
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/// Perform `dest` = `dest` - (`src` + CF). Sets flags.
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/// Perform `dest` = `dest` - (`src` + CF). Sets flags.
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pub fn sbb(&mut self, dest: ModRmTarget, src: Operand) {
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pub fn sbb(&mut self, dest: ModRmTarget, src: ArithmeticOperand) {
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let cf = self.flags.cf as u8;
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let cf = self.flags.cf as u8;
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// cheating, by flattening into immediates, but this allows to easily add the opt. carry
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// cheating, by flattening into immediates, but this allows to easily add the opt. carry
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let src_with_carry = match src {
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let src_with_carry = match src {
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Operand::Immediate(immediate_operand) => Operand::Immediate(immediate_operand + cf),
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ArithmeticOperand::Immediate(immediate_operand) => {
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Operand::ModRmTarget(mod_rm_target) => Operand::Immediate(match mod_rm_target {
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ArithmeticOperand::Immediate(immediate_operand + cf)
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ModRmTarget::Memory(idx) => self.memory.read(&self.regs, idx) + cf,
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}
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ModRmTarget::Register(reg) => self.regs.read(reg) + cf,
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ArithmeticOperand::ModRmTarget(mod_rm_target) => {
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}),
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ArithmeticOperand::Immediate(match mod_rm_target {
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ModRmTarget::Memory(idx) => self.memory.read(&self.regs, idx) + cf,
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ModRmTarget::Register(reg) => self.regs.read(reg) + cf,
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})
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}
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};
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};
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs - rhs;
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let op: fn(Lhs, Rhs) -> ArithmeticResult = |lhs, rhs| lhs - rhs;
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, lhs, rhs| {
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let flag_set: fn(&mut Flags, ArithmeticResult, Lhs, Rhs) = |flags, result, lhs, rhs| {
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@@ -201,15 +209,21 @@ impl Computer {
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/// it to `dest`, if `write` is set, and sets flags, according to [`F`].
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/// it to `dest`, if `write` is set, and sets flags, according to [`F`].
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/// A result can never be saved to an immediate Operand, so `dest` can only
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/// A result can never be saved to an immediate Operand, so `dest` can only
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/// be a [`ModRmTarget`].
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/// be a [`ModRmTarget`].
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fn op<O, F>(&mut self, op: O, flag_set: F, write: bool, dest: ModRmTarget, src: Operand)
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fn op<O, F>(
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where
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&mut self,
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op: O,
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flag_set: F,
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write: bool,
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dest: ModRmTarget,
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src: ArithmeticOperand,
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) where
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O: Fn(Lhs, Rhs) -> ArithmeticResult,
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O: Fn(Lhs, Rhs) -> ArithmeticResult,
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F: Fn(&mut Flags, ArithmeticResult, Lhs, Rhs),
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F: Fn(&mut Flags, ArithmeticResult, Lhs, Rhs),
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{
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{
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let lhs = self.read_modrm(dest);
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let lhs = self.read_modrm(dest);
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let rhs = match src {
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let rhs = match src {
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Operand::Immediate(imm) => imm,
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ArithmeticOperand::Immediate(imm) => imm,
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Operand::ModRmTarget(target) => self.read_modrm(target),
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ArithmeticOperand::ModRmTarget(target) => self.read_modrm(target),
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};
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};
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let result = op(lhs, rhs);
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let result = op(lhs, rhs);
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if write {
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if write {
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@@ -8,7 +8,7 @@ use crate::{
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};
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};
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use super::{
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use super::{
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computer::{Computer, Operand},
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computer::{ArithmeticOperand, Computer},
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interrupt::InterruptMessage,
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interrupt::InterruptMessage,
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};
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};
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@@ -78,25 +78,29 @@ impl Interpreter {
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/*
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/*
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* ADD
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* ADD
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*/
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*/
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Mnemonic::ADD_FromReg(dest, src) => self
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Mnemonic::ADD_FromReg(dest, src) => self.computer.add(
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.computer
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dest,
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.add(dest, Operand::ModRmTarget(ModRmTarget::Register(src))),
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ArithmeticOperand::ModRmTarget(ModRmTarget::Register(src)),
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Mnemonic::ADD_ToReg(src, dest) => self
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),
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.computer
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Mnemonic::ADD_ToReg(src, dest) => self.computer.add(
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.add(ModRmTarget::Register(dest), Operand::ModRmTarget(src)),
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ModRmTarget::Register(dest),
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Mnemonic::ADD_Ib(dest, src) => self
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ArithmeticOperand::ModRmTarget(src),
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.computer
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),
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.add(dest, Operand::Immediate(ImmediateOperand::Byte(src))),
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Mnemonic::ADD_Ib(dest, src) => self.computer.add(
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Mnemonic::ADD_Iv(dest, src) => self
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dest,
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.computer
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ArithmeticOperand::Immediate(ImmediateOperand::Byte(src)),
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.add(dest, Operand::Immediate(ImmediateOperand::Word(src))),
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),
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Mnemonic::ADD_Iv(dest, src) => self.computer.add(
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dest,
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ArithmeticOperand::Immediate(ImmediateOperand::Word(src)),
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),
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Mnemonic::ADD_ALIb(src_byte) => self.computer.add(
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Mnemonic::ADD_ALIb(src_byte) => self.computer.add(
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ModRmTarget::Register(crate::register::Register::AL),
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ModRmTarget::Register(crate::register::Register::AL),
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Operand::Immediate(ImmediateOperand::Byte(src_byte)),
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ArithmeticOperand::Immediate(ImmediateOperand::Byte(src_byte)),
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),
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),
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Mnemonic::ADD_AXIv(src_word) => self.computer.add(
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Mnemonic::ADD_AXIv(src_word) => self.computer.add(
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ModRmTarget::Register(crate::register::Register::AX),
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ModRmTarget::Register(crate::register::Register::AX),
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Operand::Immediate(ImmediateOperand::Word(src_word)),
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ArithmeticOperand::Immediate(ImmediateOperand::Word(src_word)),
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),
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),
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/*
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/*
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* PUSH
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* PUSH
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@@ -117,97 +121,113 @@ impl Interpreter {
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/*
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/*
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* OR
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* OR
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*/
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*/
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Mnemonic::OR_FromReg(dest, src) => self
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Mnemonic::OR_FromReg(dest, src) => self.computer.or(
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.computer
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dest,
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.or(dest, Operand::ModRmTarget(ModRmTarget::Register(src))),
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ArithmeticOperand::ModRmTarget(ModRmTarget::Register(src)),
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Mnemonic::OR_ToReg(src, dest) => self
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),
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.computer
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Mnemonic::OR_ToReg(src, dest) => self.computer.or(
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.or(ModRmTarget::Register(dest), Operand::ModRmTarget(src)),
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ModRmTarget::Register(dest),
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Mnemonic::OR_Ib(dest, src) => self
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ArithmeticOperand::ModRmTarget(src),
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.computer
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),
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.or(dest, Operand::Immediate(ImmediateOperand::Byte(src))),
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Mnemonic::OR_Ib(dest, src) => self.computer.or(
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Mnemonic::OR_Iv(dest, src) => self
|
dest,
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.computer
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ArithmeticOperand::Immediate(ImmediateOperand::Byte(src)),
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.or(dest, Operand::Immediate(ImmediateOperand::Word(src))),
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),
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Mnemonic::OR_Iv(dest, src) => self.computer.or(
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dest,
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ArithmeticOperand::Immediate(ImmediateOperand::Word(src)),
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),
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Mnemonic::OR_ALIb(src_byte) => self.computer.or(
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Mnemonic::OR_ALIb(src_byte) => self.computer.or(
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ModRmTarget::Register(crate::register::Register::AL),
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ModRmTarget::Register(crate::register::Register::AL),
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Operand::Immediate(ImmediateOperand::Byte(src_byte)),
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ArithmeticOperand::Immediate(ImmediateOperand::Byte(src_byte)),
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),
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),
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Mnemonic::OR_AXIv(src_word) => self.computer.or(
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Mnemonic::OR_AXIv(src_word) => self.computer.or(
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ModRmTarget::Register(crate::register::Register::AX),
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ModRmTarget::Register(crate::register::Register::AX),
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Operand::Immediate(ImmediateOperand::Word(src_word)),
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ArithmeticOperand::Immediate(ImmediateOperand::Word(src_word)),
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),
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),
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|
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/*
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/*
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* ADC - add with carry
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* ADC - add with carry
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*/
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*/
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Mnemonic::ADC_FromReg(dest, src) => self
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Mnemonic::ADC_FromReg(dest, src) => self.computer.adc(
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.computer
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dest,
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.adc(dest, Operand::ModRmTarget(ModRmTarget::Register(src))),
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ArithmeticOperand::ModRmTarget(ModRmTarget::Register(src)),
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Mnemonic::ADC_ToReg(src, dest) => self
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),
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.computer
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Mnemonic::ADC_ToReg(src, dest) => self.computer.adc(
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.adc(ModRmTarget::Register(dest), Operand::ModRmTarget(src)),
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ModRmTarget::Register(dest),
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Mnemonic::ADC_Ib(dest, src) => self
|
ArithmeticOperand::ModRmTarget(src),
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.computer
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),
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.adc(dest, Operand::Immediate(ImmediateOperand::Byte(src))),
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Mnemonic::ADC_Ib(dest, src) => self.computer.adc(
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Mnemonic::ADC_Iv(dest, src) => self
|
dest,
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.computer
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ArithmeticOperand::Immediate(ImmediateOperand::Byte(src)),
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.adc(dest, Operand::Immediate(ImmediateOperand::Word(src))),
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),
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Mnemonic::ADC_Iv(dest, src) => self.computer.adc(
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|
dest,
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ArithmeticOperand::Immediate(ImmediateOperand::Word(src)),
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),
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Mnemonic::ADC_ALIb(src_byte) => self.computer.adc(
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Mnemonic::ADC_ALIb(src_byte) => self.computer.adc(
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ModRmTarget::Register(crate::register::Register::AL),
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ModRmTarget::Register(crate::register::Register::AL),
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Operand::Immediate(ImmediateOperand::Byte(src_byte)),
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ArithmeticOperand::Immediate(ImmediateOperand::Byte(src_byte)),
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),
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),
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Mnemonic::ADC_AXIv(src_word) => self.computer.adc(
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Mnemonic::ADC_AXIv(src_word) => self.computer.adc(
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ModRmTarget::Register(crate::register::Register::AX),
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ModRmTarget::Register(crate::register::Register::AX),
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Operand::Immediate(ImmediateOperand::Word(src_word)),
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ArithmeticOperand::Immediate(ImmediateOperand::Word(src_word)),
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),
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),
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|
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/*
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/*
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||||||
* SBB - subtract with borrow
|
* SBB - subtract with borrow
|
||||||
*/
|
*/
|
||||||
Mnemonic::SBB_FromReg(dest, src) => self
|
Mnemonic::SBB_FromReg(dest, src) => self.computer.sbb(
|
||||||
.computer
|
dest,
|
||||||
.sbb(dest, Operand::ModRmTarget(ModRmTarget::Register(src))),
|
ArithmeticOperand::ModRmTarget(ModRmTarget::Register(src)),
|
||||||
Mnemonic::SBB_ToReg(src, dest) => self
|
),
|
||||||
.computer
|
Mnemonic::SBB_ToReg(src, dest) => self.computer.sbb(
|
||||||
.sbb(ModRmTarget::Register(dest), Operand::ModRmTarget(src)),
|
ModRmTarget::Register(dest),
|
||||||
Mnemonic::SBB_Ib(dest, src) => self
|
ArithmeticOperand::ModRmTarget(src),
|
||||||
.computer
|
),
|
||||||
.sbb(dest, Operand::Immediate(ImmediateOperand::Byte(src))),
|
Mnemonic::SBB_Ib(dest, src) => self.computer.sbb(
|
||||||
Mnemonic::SBB_Iv(dest, src) => self
|
dest,
|
||||||
.computer
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src)),
|
||||||
.sbb(dest, Operand::Immediate(ImmediateOperand::Word(src))),
|
),
|
||||||
|
Mnemonic::SBB_Iv(dest, src) => self.computer.sbb(
|
||||||
|
dest,
|
||||||
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src)),
|
||||||
|
),
|
||||||
Mnemonic::SBB_ALIb(src_byte) => self.computer.sbb(
|
Mnemonic::SBB_ALIb(src_byte) => self.computer.sbb(
|
||||||
ModRmTarget::Register(crate::register::Register::AL),
|
ModRmTarget::Register(crate::register::Register::AL),
|
||||||
Operand::Immediate(ImmediateOperand::Byte(src_byte)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src_byte)),
|
||||||
),
|
),
|
||||||
Mnemonic::SBB_AXIv(src_word) => self.computer.sbb(
|
Mnemonic::SBB_AXIv(src_word) => self.computer.sbb(
|
||||||
ModRmTarget::Register(crate::register::Register::AX),
|
ModRmTarget::Register(crate::register::Register::AX),
|
||||||
Operand::Immediate(ImmediateOperand::Word(src_word)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src_word)),
|
||||||
),
|
),
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* AND
|
* AND
|
||||||
*/
|
*/
|
||||||
Mnemonic::AND_FromReg(dest, src) => self
|
Mnemonic::AND_FromReg(dest, src) => self.computer.and(
|
||||||
.computer
|
dest,
|
||||||
.and(dest, Operand::ModRmTarget(ModRmTarget::Register(src))),
|
ArithmeticOperand::ModRmTarget(ModRmTarget::Register(src)),
|
||||||
Mnemonic::AND_ToReg(src, dest) => self
|
),
|
||||||
.computer
|
Mnemonic::AND_ToReg(src, dest) => self.computer.and(
|
||||||
.and(ModRmTarget::Register(dest), Operand::ModRmTarget(src)),
|
ModRmTarget::Register(dest),
|
||||||
Mnemonic::AND_Ib(dest, src) => self
|
ArithmeticOperand::ModRmTarget(src),
|
||||||
.computer
|
),
|
||||||
.and(dest, Operand::Immediate(ImmediateOperand::Byte(src))),
|
Mnemonic::AND_Ib(dest, src) => self.computer.and(
|
||||||
Mnemonic::AND_Iv(dest, src) => self
|
dest,
|
||||||
.computer
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src)),
|
||||||
.and(dest, Operand::Immediate(ImmediateOperand::Word(src))),
|
),
|
||||||
|
Mnemonic::AND_Iv(dest, src) => self.computer.and(
|
||||||
|
dest,
|
||||||
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src)),
|
||||||
|
),
|
||||||
Mnemonic::AND_ALIb(src_byte) => self.computer.and(
|
Mnemonic::AND_ALIb(src_byte) => self.computer.and(
|
||||||
ModRmTarget::Register(crate::register::Register::AL),
|
ModRmTarget::Register(crate::register::Register::AL),
|
||||||
Operand::Immediate(ImmediateOperand::Byte(src_byte)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src_byte)),
|
||||||
),
|
),
|
||||||
Mnemonic::AND_AXIv(src_word) => self.computer.and(
|
Mnemonic::AND_AXIv(src_word) => self.computer.and(
|
||||||
ModRmTarget::Register(crate::register::Register::AX),
|
ModRmTarget::Register(crate::register::Register::AX),
|
||||||
Operand::Immediate(ImmediateOperand::Word(src_word)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src_word)),
|
||||||
),
|
),
|
||||||
/*
|
/*
|
||||||
* Override
|
* Override
|
||||||
@@ -220,73 +240,85 @@ impl Interpreter {
|
|||||||
/*
|
/*
|
||||||
* SUB
|
* SUB
|
||||||
*/
|
*/
|
||||||
Mnemonic::SUB_FromReg(dest, src) => self
|
Mnemonic::SUB_FromReg(dest, src) => self.computer.sub(
|
||||||
.computer
|
dest,
|
||||||
.sub(dest, Operand::ModRmTarget(ModRmTarget::Register(src))),
|
ArithmeticOperand::ModRmTarget(ModRmTarget::Register(src)),
|
||||||
Mnemonic::SUB_ToReg(src, dest) => self
|
),
|
||||||
.computer
|
Mnemonic::SUB_ToReg(src, dest) => self.computer.sub(
|
||||||
.sub(ModRmTarget::Register(dest), Operand::ModRmTarget(src)),
|
ModRmTarget::Register(dest),
|
||||||
Mnemonic::SUB_Ib(dest, src) => self
|
ArithmeticOperand::ModRmTarget(src),
|
||||||
.computer
|
),
|
||||||
.sub(dest, Operand::Immediate(ImmediateOperand::Byte(src))),
|
Mnemonic::SUB_Ib(dest, src) => self.computer.sub(
|
||||||
Mnemonic::SUB_Iv(dest, src) => self
|
dest,
|
||||||
.computer
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src)),
|
||||||
.sub(dest, Operand::Immediate(ImmediateOperand::Word(src))),
|
),
|
||||||
|
Mnemonic::SUB_Iv(dest, src) => self.computer.sub(
|
||||||
|
dest,
|
||||||
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src)),
|
||||||
|
),
|
||||||
Mnemonic::SUB_ALIb(src_byte) => self.computer.sub(
|
Mnemonic::SUB_ALIb(src_byte) => self.computer.sub(
|
||||||
ModRmTarget::Register(crate::register::Register::AL),
|
ModRmTarget::Register(crate::register::Register::AL),
|
||||||
Operand::Immediate(ImmediateOperand::Byte(src_byte)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src_byte)),
|
||||||
),
|
),
|
||||||
Mnemonic::SUB_AXIv(src_word) => self.computer.sub(
|
Mnemonic::SUB_AXIv(src_word) => self.computer.sub(
|
||||||
ModRmTarget::Register(crate::register::Register::AX),
|
ModRmTarget::Register(crate::register::Register::AX),
|
||||||
Operand::Immediate(ImmediateOperand::Word(src_word)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src_word)),
|
||||||
),
|
),
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* XOR
|
* XOR
|
||||||
*/
|
*/
|
||||||
Mnemonic::XOR_FromReg(dest, src) => self
|
Mnemonic::XOR_FromReg(dest, src) => self.computer.xor(
|
||||||
.computer
|
dest,
|
||||||
.xor(dest, Operand::ModRmTarget(ModRmTarget::Register(src))),
|
ArithmeticOperand::ModRmTarget(ModRmTarget::Register(src)),
|
||||||
Mnemonic::XOR_ToReg(src, dest) => self
|
),
|
||||||
.computer
|
Mnemonic::XOR_ToReg(src, dest) => self.computer.xor(
|
||||||
.xor(ModRmTarget::Register(dest), Operand::ModRmTarget(src)),
|
ModRmTarget::Register(dest),
|
||||||
Mnemonic::XOR_Ib(dest, src) => self
|
ArithmeticOperand::ModRmTarget(src),
|
||||||
.computer
|
),
|
||||||
.xor(dest, Operand::Immediate(ImmediateOperand::Byte(src))),
|
Mnemonic::XOR_Ib(dest, src) => self.computer.xor(
|
||||||
Mnemonic::XOR_Iv(dest, src) => self
|
dest,
|
||||||
.computer
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src)),
|
||||||
.xor(dest, Operand::Immediate(ImmediateOperand::Word(src))),
|
),
|
||||||
|
Mnemonic::XOR_Iv(dest, src) => self.computer.xor(
|
||||||
|
dest,
|
||||||
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src)),
|
||||||
|
),
|
||||||
Mnemonic::XOR_ALIb(src_byte) => self.computer.xor(
|
Mnemonic::XOR_ALIb(src_byte) => self.computer.xor(
|
||||||
ModRmTarget::Register(crate::register::Register::AL),
|
ModRmTarget::Register(crate::register::Register::AL),
|
||||||
Operand::Immediate(ImmediateOperand::Byte(src_byte)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src_byte)),
|
||||||
),
|
),
|
||||||
Mnemonic::XOR_AXIv(src_word) => self.computer.xor(
|
Mnemonic::XOR_AXIv(src_word) => self.computer.xor(
|
||||||
ModRmTarget::Register(crate::register::Register::AX),
|
ModRmTarget::Register(crate::register::Register::AX),
|
||||||
Operand::Immediate(ImmediateOperand::Word(src_word)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src_word)),
|
||||||
),
|
),
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* CMP
|
* CMP
|
||||||
*/
|
*/
|
||||||
Mnemonic::CMP_FromReg(dest, src) => self
|
Mnemonic::CMP_FromReg(dest, src) => self.computer.cmp(
|
||||||
.computer
|
dest,
|
||||||
.cmp(dest, Operand::ModRmTarget(ModRmTarget::Register(src))),
|
ArithmeticOperand::ModRmTarget(ModRmTarget::Register(src)),
|
||||||
Mnemonic::CMP_ToReg(src, dest) => self
|
),
|
||||||
.computer
|
Mnemonic::CMP_ToReg(src, dest) => self.computer.cmp(
|
||||||
.cmp(ModRmTarget::Register(dest), Operand::ModRmTarget(src)),
|
ModRmTarget::Register(dest),
|
||||||
Mnemonic::CMP_Ib(dest, src) => self
|
ArithmeticOperand::ModRmTarget(src),
|
||||||
.computer
|
),
|
||||||
.cmp(dest, Operand::Immediate(ImmediateOperand::Byte(src))),
|
Mnemonic::CMP_Ib(dest, src) => self.computer.cmp(
|
||||||
Mnemonic::CMP_Iv(dest, src) => self
|
dest,
|
||||||
.computer
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src)),
|
||||||
.cmp(dest, Operand::Immediate(ImmediateOperand::Word(src))),
|
),
|
||||||
|
Mnemonic::CMP_Iv(dest, src) => self.computer.cmp(
|
||||||
|
dest,
|
||||||
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src)),
|
||||||
|
),
|
||||||
Mnemonic::CMP_ALIb(src_byte) => self.computer.cmp(
|
Mnemonic::CMP_ALIb(src_byte) => self.computer.cmp(
|
||||||
ModRmTarget::Register(crate::register::Register::AL),
|
ModRmTarget::Register(crate::register::Register::AL),
|
||||||
Operand::Immediate(ImmediateOperand::Byte(src_byte)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src_byte)),
|
||||||
),
|
),
|
||||||
Mnemonic::CMP_AXIv(src_word) => self.computer.cmp(
|
Mnemonic::CMP_AXIv(src_word) => self.computer.cmp(
|
||||||
ModRmTarget::Register(crate::register::Register::AX),
|
ModRmTarget::Register(crate::register::Register::AX),
|
||||||
Operand::Immediate(ImmediateOperand::Word(src_word)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src_word)),
|
||||||
),
|
),
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -385,22 +417,25 @@ impl Interpreter {
|
|||||||
/*
|
/*
|
||||||
* Test
|
* Test
|
||||||
*/
|
*/
|
||||||
Mnemonic::TEST(dest, src) => self
|
Mnemonic::TEST(dest, src) => self.computer.test(
|
||||||
.computer
|
dest,
|
||||||
.test(dest, Operand::ModRmTarget(ModRmTarget::Register(src))),
|
ArithmeticOperand::ModRmTarget(ModRmTarget::Register(src)),
|
||||||
Mnemonic::TEST_Ib(dest, src) => self
|
),
|
||||||
.computer
|
Mnemonic::TEST_Ib(dest, src) => self.computer.test(
|
||||||
.test(dest, Operand::Immediate(ImmediateOperand::Byte(src))),
|
dest,
|
||||||
Mnemonic::TEST_Iv(dest, src) => self
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src)),
|
||||||
.computer
|
),
|
||||||
.test(dest, Operand::Immediate(ImmediateOperand::Word(src))),
|
Mnemonic::TEST_Iv(dest, src) => self.computer.test(
|
||||||
|
dest,
|
||||||
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src)),
|
||||||
|
),
|
||||||
Mnemonic::TEST_ALIb(src_byte) => self.computer.test(
|
Mnemonic::TEST_ALIb(src_byte) => self.computer.test(
|
||||||
ModRmTarget::Register(crate::register::Register::AL),
|
ModRmTarget::Register(crate::register::Register::AL),
|
||||||
Operand::Immediate(ImmediateOperand::Byte(src_byte)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Byte(src_byte)),
|
||||||
),
|
),
|
||||||
Mnemonic::TEST_AXIv(src_word) => self.computer.test(
|
Mnemonic::TEST_AXIv(src_word) => self.computer.test(
|
||||||
ModRmTarget::Register(crate::register::Register::AX),
|
ModRmTarget::Register(crate::register::Register::AX),
|
||||||
Operand::Immediate(ImmediateOperand::Word(src_word)),
|
ArithmeticOperand::Immediate(ImmediateOperand::Word(src_word)),
|
||||||
),
|
),
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|||||||
Reference in New Issue
Block a user