marcothms/8086-rs
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fix(interpreter): fix mov AX0b instruction

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Should not be imm, but a memoryindex
This commit is contained in:
Marco Thomas
2025-07-24 11:43:30 +09:00
parent 4cc97cffbf
commit 2cb50b5908
4 changed files with 12 additions and 9 deletions
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4
src/disasm.rs
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@@ -762,8 +762,8 @@ impl Disassembler {
0x9E => Mnemonic::SAHF, 0x9E => Mnemonic::SAHF,
0x9F => Mnemonic::LAHF, 0x9F => Mnemonic::LAHF,
0xA0 => Mnemonic::MOV_AL0b(self.parse_byte()?), 0xA0 => Mnemonic::MOV_AL0b(self.parse_byte()?.into()),
0xA1 => Mnemonic::MOV_AX0v(self.parse_word()?), 0xA1 => Mnemonic::MOV_AX0v(self.parse_word()?.into()),
0xA2 => Mnemonic::MOV_0bAL(self.parse_byte()?), 0xA2 => Mnemonic::MOV_0bAL(self.parse_byte()?),
0xA3 => Mnemonic::MOV_0vAX(self.parse_word()?), 0xA3 => Mnemonic::MOV_0vAX(self.parse_word()?),
0xA4 => Mnemonic::MOVSB, 0xA4 => Mnemonic::MOVSB,

8
src/instructions.rs
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@@ -217,8 +217,8 @@ pub enum Mnemonic {
MOV_Ib(ModRmTarget, Byte), MOV_Ib(ModRmTarget, Byte),
MOV_Iv(ModRmTarget, Word), MOV_Iv(ModRmTarget, Word),
MOV_AL0b(Byte), MOV_AL0b(MemoryIndex),
MOV_AX0v(Word), MOV_AX0v(MemoryIndex),
MOV_0bAL(Byte), MOV_0bAL(Byte),
MOV_0vAX(Word), MOV_0vAX(Word),
@@ -511,8 +511,8 @@ impl fmt::Display for Mnemonic {
ModRmTarget::Register(_) => write!(f, "mov word {target}, {word:#04x}"), ModRmTarget::Register(_) => write!(f, "mov word {target}, {word:#04x}"),
}, },
Self::MOV_AL0b(byte) => write!(f, "mov {}, {byte:#04x}", Register::AL), Self::MOV_AL0b(idx) => write!(f, "mov {}, {idx}", Register::AL),
Self::MOV_AX0v(word) => write!(f, "mov {}, {word:#04x}", Register::AX), Self::MOV_AX0v(idx) => write!(f, "mov {}, {idx}", Register::AX),
Self::MOV_0bAL(byte) => write!(f, "mov {byte:#04x}, {}", Register::AL), Self::MOV_0bAL(byte) => write!(f, "mov {byte:#04x}, {}", Register::AL),
Self::MOV_0vAX(word) => write!(f, "mov {word:#04x}, {}", Register::AX), Self::MOV_0vAX(word) => write!(f, "mov {word:#04x}, {}", Register::AX),

3
src/interpreter/computer.rs
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@@ -412,7 +412,8 @@ impl Computer {
let factor = match segment_selector { let factor = match segment_selector {
crate::register::SegmentRegister::DS => self.sregs.ds * 16, crate::register::SegmentRegister::DS => self.sregs.ds * 16,
crate::register::SegmentRegister::SS => self.sregs.ss * 16, crate::register::SegmentRegister::SS => self.sregs.ss * 16,
_ => 0, crate::register::SegmentRegister::ES => self.sregs.es * 16,
crate::register::SegmentRegister::CS => self.sregs.cs * 16,
}; };
(ImmediateOperand::from(factor) + base + index + disp).into() (ImmediateOperand::from(factor) + base + index + disp).into()
} }

6
src/interpreter/interpreter.rs
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@@ -564,8 +564,10 @@ impl Interpreter {
Mnemonic::MOV_Ib(target, val) => self.computer.write_modrm(target, val.into())?, Mnemonic::MOV_Ib(target, val) => self.computer.write_modrm(target, val.into())?,
Mnemonic::MOV_Iv(target, val) => self.computer.write_modrm(target, val.into())?, Mnemonic::MOV_Iv(target, val) => self.computer.write_modrm(target, val.into())?,
Mnemonic::MOV_AL0b(val) => self.computer.regs.ax.lower = val, Mnemonic::MOV_AL0b(idx) => {
Mnemonic::MOV_AX0v(val) => self.computer.regs.ax.write(val), self.computer.regs.ax.lower = self.computer.read(idx)? as Byte
}
Mnemonic::MOV_AX0v(idx) => self.computer.regs.ax.write(self.computer.read(idx)?),
Mnemonic::MOV_0bAL(b) => self Mnemonic::MOV_0bAL(b) => self
.computer .computer
.write(self.computer.regs.ax.lower.into(), b.into())?, .write(self.computer.regs.ax.lower.into(), b.into())?,