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fix: dont interpret padding as instructions

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a.out padds the text section with 0-bytes, which where interpreted
as 0x00 0x00 instruction and occasionally as a single 0x00 byte. Add
logic to ignore single 0x00 bytes and to remove dangling 0x00 0x00
instructions at the end of the instruction vec, so only the 'actual'
instructions are presented in the end. Also adjust visibility of
methods, so only the truncated instructions will ever be presented.

Of course, this could remove an actual `0x00 0x00` instruction from the
end, but they would not have any effect on execution anyway.
This commit is contained in:
Marco Thomas
2025-05-27 11:01:44 +09:00
parent 5c8702fb95
commit 322a276617
5 changed files with 189 additions and 135 deletions
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6
src/disasm_macros.rs
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@@ -2,7 +2,7 @@
#[macro_export]
/// Generate a Mnemonic for an 8-bit Register from a ModRM byte.
macro_rules! modrmb {
macro_rules! modrm_target_bytewidth {
($self:ident, $variant:ident) => {{
let (target, reg) = $self.parse_modrm_byte(Operand::Byte(0))?;
Mnemonic::$variant(target, Register::by_id(Operand::Byte(reg))?)
@@ -11,7 +11,7 @@ macro_rules! modrmb {
#[macro_export]
/// Generate a Mnemonic for a 16-bit Register from a ModRM byte.
macro_rules! modrmv {
macro_rules! modrm_instruction_wordwidth {
($self:ident, $variant:ident) => {{
let (target, reg) = $self.parse_modrm_byte(Operand::Word(0))?;
Mnemonic::$variant(target, Register::by_id(Operand::Word(reg.into()))?)
@@ -20,7 +20,7 @@ macro_rules! modrmv {
#[macro_export]
/// Generate a Mnemonic for a 16-bit Segment Register from a ModRM byte.
macro_rules! modrms {
macro_rules! modrm_instruction_sregister {
($self:ident, $variant:ident) => {{
let (target, reg) = $self.parse_modrm_byte(Operand::Word(0))?;
Mnemonic::$variant(target, SegmentRegister::by_id(reg)?)