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ft(interpreter): impl far jumps with correct CS addressing

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Marco Thomas
2025-06-18 16:41:49 +09:00
parent 6678a1ef4a
commit 4aeacc649a
8 changed files with 116 additions and 30 deletions
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README.md
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@@ -49,9 +49,13 @@ This project is under active development and primarily used by me to explore som
Expect bugs and some missing features.
I mainly test with 'official' binaries from the MINIX source tree.
Currently, everything is in the binary, but I want to move some parts to a lib, which would make it much easier to ignore the Minix 1.x specifics and would allow for more generic usage of this 8086 (e.g. implenting an own simple BIOS or OS).
E.g. currently the interrupt handler is hardcoded to support only Minix 1.x interrupts.
But first I want to implement all features correctly and add tests for all of them, before I want to move to that.
Currently, everything is in the binary, but I want to move some parts to a lib, which would make it much easier to ignore the Minix 1.x specifics (e.g. currently with a hardcoded interrupt handler) and would allow for more generic usage of this 8086 (e.g. implenting an own simple BIOS or OS).
But first I want to implement all features correctly and add tests for all of them, before I want to move to that.
## Caveats
Interpreted code is disassembled into a Vector, which will also be used for execution.
This means, that the code is not actually loaded into memory, but the `CS:IP` addressing scheme is still being used.
## Documentation
@@ -62,7 +66,9 @@ $ cargo doc
$ firefox target/doc/8086_rs/index.html
```
For the implementation of all instructions I used the Intel "8086 16-BIT HMOS MICROPROCESSOR" Spec, as well as [this](http://www.mlsite.net/8086/8086_table.txt) overview of all Opcode variants used in conjunction with [this](http://www.mlsite.net/8086/) decoding matrix.
For the implementation of the disassembly, I used the Intel "8086 16-BIT HMOS MICROPROCESSOR" Spec, as well as [this](http://www.mlsite.net/8086/8086_table.txt) overview of all Opcode variants used in conjunction with [this](http://www.mlsite.net/8086/) decoding matrix.
For the implementation of the interpreter, I used the Intel "Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 2 (2A, 2B, 2C & 2D): Instruction Set Reference, A-Z" Spec.
## FAQ