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ft: rename to i8086-rs

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Marco Thomas
2025-07-08 09:56:08 +09:00
parent 0a1fd0e4c6
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README.md
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@@ -5,7 +5,7 @@
It includes:
- a.out Parser to parse legacy MINIX 1.x executables.
- 8086 disassembler to parse the 16-bit instructions into an IR and prints them in a `objdump(1)`-style fashion.
- 8086 interpreter which interprets the instructions with MINIX 1.x conventions (e.g. interrupts, memory layout, ...) in mind and obeys segment register indirection, which enables the usage of the entire 20-bit memory bus.
- 8086 interpreter which interprets the instructions with MINIX 1.x conventions (e.g. interrupts, memory layout, ...) in mind and obeys segment register indirection, which enables the usage of the **entire 20-bit memory bus**.
## Usage
@@ -27,19 +27,22 @@ RUST_LOG=debug cargo run -- interpret -p ./a.out 2>&1 | less
CLI Options:
```
$ cargo run -- --help
Simple program to disassemble and interpret 8086 a.out compilates, e.g. such for MINIX
Usage: 8086-rs [OPTIONS] <COMMAND>
Commands:
disasm Disassemble the binary into 8086 instructions
interpret Interpret the 8086 instructions
help Print this message or the help of the given subcommand(s)
Options:
-p, --path <PATH> Path of the binary
-d, --dump Dump progress of disassembly, in case of encountering an error
-h, --help Print help
Simple program to disassemble and interpret 8086 a.out compilates, e.g. such for MINIX
Usage: i8086-rs [OPTIONS] [ARGV]... <COMMAND>
Commands:
disassemble Disassemble the binary into 8086 instructions [aliases: d]
interpret Interpret the 8086 instructions [aliases: i]
help Print this message or the help of the given subcommand(s)
Arguments:
[ARGV]... argv passed to the program, which will be interpreted
Options:
-p, --path <PATH> Path of the binary
-d, --dump Dump progress of disassembly, in case of encountering an error
-h, --help Print help
-V, --version Print version
```
@@ -54,16 +57,18 @@ But first I want to implement all features correctly and add tests for all of th
## Caveats
Interpreted code is disassembled into a Vector, which will also be used for execution.
This means, that the code is not actually loaded into memory, but the `CS:IP` addressing scheme is still being used.
Code is currently not fetched from memory, but from a seperate vector, stored inside the Disassembler struct, which fetches and parses the next instruction from the instruction pointer.
Although, the `CS:IP` addressing scheme is still being used, to allow for 20-bit access, but does currently now allow for self-modifying code.
Also the disassmbler just uses an initial sweep for disassembly, which has a high probability of not being accurate, when compared to the runtime.
E.g. maybe there is a jump to a memory address during interpretation, which was not identified as an instruction by the disassembler.
## Documentation
The documentation of the project itself can be accessed by using `cargo doc`.
```
$ cargo doc
$ firefox target/doc/8086_rs/index.html
$ firefox target/doc/i8086_rs/index.html
```
For the implementation of the disassembly, I used the Intel "8086 16-BIT HMOS MICROPROCESSOR" Spec, as well as [this](http://www.mlsite.net/8086/8086_table.txt) overview of all Opcode variants used in conjunction with [this](http://www.mlsite.net/8086/) decoding matrix.