From 8ea91d80b8ca215b07858445ce4f6cc416897409 Mon Sep 17 00:00:00 2001
From: Marco Thomas <github@marcothms.de>
Date: Sun, 25 May 2025 21:20:12 +0900
Subject: [PATCH] ft: add first basic test

---
 src/disasm.rs       | 33 +++++++++++++++++++++++++++++++++
 src/instructions.rs |  4 ++--
 src/operands.rs     |  8 ++++----
 src/register.rs     |  4 ++--
 4 files changed, 41 insertions(+), 8 deletions(-)

diff --git a/src/disasm.rs b/src/disasm.rs
index cedb076..e62b3c6 100644
--- a/src/disasm.rs
+++ b/src/disasm.rs
@@ -829,3 +829,36 @@ impl Disassembler {
         Ok(instructions)
     }
 }
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    #[test]
+    fn test_basic() {
+        let text = Vec::from([0x0, 0x0]);
+        let mut disassembler = Disassembler {
+            offset: 0,
+            text,
+            instruction: Instruction::new(),
+        };
+        let instructions = disassembler.decode_instructions().ok();
+        if let Some(instrs) = instructions {
+            assert_eq!(
+                instrs[0],
+                Instruction {
+                    start: 0,
+                    raw: Vec::from([0, 0]),
+                    opcode: Mnemonic::ADD_FromReg(
+                        ModRmTarget::Memory(MemoryIndex {
+                            base: Some(Register::BX),
+                            index: Some(Register::SI),
+                            displacement: None
+                        }),
+                        Register::AL
+                    )
+                }
+            )
+        }
+    }
+}
diff --git a/src/instructions.rs b/src/instructions.rs
index 91e86f1..e622d40 100644
--- a/src/instructions.rs
+++ b/src/instructions.rs
@@ -6,7 +6,7 @@ use crate::{
 };
 use core::fmt;
 
-#[derive(Debug, Clone)]
+#[derive(Debug, Clone, Eq, PartialEq)]
 #[allow(dead_code)]
 /// A single 'line' of executable ASM is called an Instruction, which
 /// contains the `Mnemonic` that will be executed, alongside its starting offset
@@ -46,7 +46,7 @@ impl fmt::Display for Instruction {
     }
 }
 
-#[derive(Debug, Clone)]
+#[derive(Debug, Clone, PartialEq, Eq)]
 #[allow(dead_code, non_camel_case_types)]
 /// All possible mnemonic variantions.
 /// These are sorted by type and are not in hex-encoding order.
diff --git a/src/operands.rs b/src/operands.rs
index e2e7811..c28c26d 100644
--- a/src/operands.rs
+++ b/src/operands.rs
@@ -39,7 +39,7 @@ impl fmt::LowerHex for Operand {
     }
 }
 
-#[derive(Debug, Clone)]
+#[derive(Debug, Clone, PartialEq, Eq)]
 /// ModRM byte can either target a memory location or some register.
 pub enum ModRmTarget {
     Memory(MemoryIndex),
@@ -55,7 +55,7 @@ impl std::fmt::Display for ModRmTarget {
     }
 }
 
-#[derive(Debug, Clone)]
+#[derive(Debug, Clone, PartialEq, Eq)]
 /// Memory displacements are signed versions of Byte and Word operands.
 /// Encodes either Byte- or Word-sized operands.
 pub enum Displacement {
@@ -95,7 +95,7 @@ impl std::fmt::Display for Displacement {
 
 /// A memory index operand is usually created by ModRM bytes or words.
 /// e.g. [bx+si]
-#[derive(Debug, Clone)]
+#[derive(Debug, Clone, PartialEq, Eq)]
 pub struct MemoryIndex {
     pub base: Option<Register>,
     pub index: Option<Register>,
@@ -131,7 +131,7 @@ impl fmt::Display for MemoryIndex {
     }
 }
 
-#[derive(Debug, Clone)]
+#[derive(Debug, Clone, PartialEq, Eq)]
 /// 32-bit segment:offset pointer (e.g. for CALL instruction)
 pub struct Pointer {
     pub raw: DWord,
diff --git a/src/register.rs b/src/register.rs
index b94ec38..844cd67 100644
--- a/src/register.rs
+++ b/src/register.rs
@@ -3,7 +3,7 @@
 use crate::{disasm::DisasmError, operands::Operand};
 use core::fmt;
 
-#[derive(Debug, Clone)]
+#[derive(Debug, Clone, PartialEq, Eq)]
 #[allow(dead_code)]
 /// Registers of a 8086 processor
 pub enum Register {
@@ -88,7 +88,7 @@ impl fmt::Display for Register {
 }
 
 /// Segment Registers of a 8086 processor
-#[derive(Debug, Clone)]
+#[derive(Debug, Clone, PartialEq, Eq)]
 #[allow(dead_code)]
 pub enum SegmentRegister {
     DS,