diff --git a/src/disasm.rs b/src/disasm.rs index ce10b0c..f746a0c 100644 --- a/src/disasm.rs +++ b/src/disasm.rs @@ -586,8 +586,15 @@ impl Disassembler { 0xC8..=0xC9 => return Err(DisasmError::OpcodeUndefined(opcode)), + 0xCA => Mnemonic::RETF_Iw(self.parse_word()), + 0xCB => Mnemonic::RETF, + + 0xCC => Mnemonic::INT(3), 0xCD => Mnemonic::INT(self.parse_byte()), + 0xCE => Mnemonic::INTO, + 0xCF => Mnemonic::IRET, + // Group 2 0xD0 => { let (target, reg) = self.parse_modrm_byte(Operand::Byte(0)); @@ -606,6 +613,15 @@ impl Disassembler { Self::modrm_reg_to_grp2_cl(reg, target) } + 0xD4 => Mnemonic::AAM(self.parse_byte()), + 0xD5 => Mnemonic::AAD(self.parse_byte()), + + 0xD6 => return Err(DisasmError::OpcodeUndefined(opcode)), + + 0xD7 => Mnemonic::XLAT, + + 0xD8..=0xDF => return Err(DisasmError::OpcodeUndefined(opcode)), + 0xE0 => Mnemonic::LOOPNZ(self.parse_byte() as IByte), 0xE1 => Mnemonic::LOOPZ(self.parse_byte() as IByte), 0xE2 => Mnemonic::LOOP(self.parse_byte() as IByte), @@ -631,11 +647,15 @@ impl Disassembler { 0xEE => Mnemonic::OUT_ALDX, 0xEF => Mnemonic::OUT_AXDX, + 0xF1 => return Err(DisasmError::OpcodeUndefined(opcode)), + 0xF2 => Mnemonic::REPNZ, 0xF3 => Mnemonic::REPZ, 0xF4 => Mnemonic::HLT, + 0xF5 => Mnemonic::CMC, + // Group 3 0xF6 => { let (target, reg) = self.parse_modrm_byte(Operand::Word(0)); diff --git a/src/instructions.rs b/src/instructions.rs index 5321ee0..5cfcdf4 100644 --- a/src/instructions.rs +++ b/src/instructions.rs @@ -259,6 +259,9 @@ pub enum Mnemonic { // RET RETIw(Word), RET, + RETF_Iw(Word), + RETF, + IRET, // Load ES/DS Register LES(ModRmTarget), LDS(ModRmTarget), @@ -301,6 +304,7 @@ pub enum Mnemonic { OUT_AXDX, // INT INT(Byte), + INTO, // Flag Manipulation CLC, STC, @@ -308,9 +312,15 @@ pub enum Mnemonic { STI, CLD, STD, + CMC, // Repeat prefix REPNZ, REPZ, + // Adjust + AAM(Byte), + AAD(Byte), + // MISC + XLAT, } impl fmt::Display for Mnemonic {