463 lines
17 KiB
Rust
463 lines
17 KiB
Rust
use core::fmt;
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use std::{fs::File, io::Read, process::exit};
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use crate::aout::Aout;
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use crate::instructions::{MemoryIndex, ModRmTarget, Operand, Pointer};
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use crate::register::{Register, RegisterId, SegmentRegister};
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use crate::{
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Args,
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instructions::{Instruction, Mnemonic},
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};
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use crate::{modrmb, modrmgprb, modrmgprv, modrms, modrmv};
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#[derive(Debug)]
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/// Generic errors, which are encountered during parsing.
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pub enum DisasmError {
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NoFile(Option<String>),
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IoError(std::io::Error),
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}
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impl From<std::io::Error> for DisasmError {
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fn from(error: std::io::Error) -> Self {
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DisasmError::IoError(error)
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}
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}
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impl fmt::Display for DisasmError {
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fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
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match self {
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DisasmError::NoFile(msg) => write!(f, "No file error: {:?}", msg),
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DisasmError::IoError(msg) => write!(f, "{}", msg),
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}
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}
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}
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/// Disassemble the binary in `path` into a vector of instructions.
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/// Main entry point to the disassembly.
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pub fn disasm(args: &Args) -> Result<Vec<Instruction>, DisasmError> {
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let contents = path_to_buf(args)?;
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let aout = Aout::new(contents);
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log::debug!("{:?}", aout);
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let mut disasm = Disassembler::new(aout);
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disasm.decode_instructions()
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}
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/// Read a filepath into a u8 buffer.
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fn path_to_buf(args: &Args) -> Result<Vec<u8>, DisasmError> {
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let path = args
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.path
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.clone()
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.ok_or(DisasmError::NoFile(args.path.clone()))?;
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let mut file = File::open(path)?;
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let mut buf = Vec::new();
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file.read_to_end(&mut buf)?;
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Ok(buf)
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}
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#[derive(Debug)]
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struct Disassembler {
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pub offset: usize, // the current offset in the disasm process
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pub text: Vec<u8>, // the aout binary
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pub instruction: Instruction, // the instruction, which is currently being parsed
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}
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impl Disassembler {
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pub fn new(aout: Aout) -> Self {
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Disassembler {
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offset: 0,
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text: aout.text,
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instruction: Instruction::new(),
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}
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}
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/// Parse a single byte of binary, return it and advance the offset.
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/// Returns the read byte.
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pub fn parse_byte(&mut self) -> u8 {
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// advance to operand
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self.offset += 1;
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let byte = self.text[self.offset];
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self.instruction.raw.push(byte);
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byte
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}
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/// Parse a single word of binary, return it and advance the offset.
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/// Returns the read word.
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pub fn parse_word(&mut self) -> u16 {
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// advance to operand
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self.offset += 1;
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let byte1 = self.text[self.offset];
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let byte2 = self.text[self.offset + 1];
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// jump onto last operand
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self.offset += 1;
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self.instruction.raw.push(byte1);
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self.instruction.raw.push(byte2);
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u16::from_le_bytes([byte1, byte2])
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}
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/// Takes in a modrm byte and returns mod, reg and r/m.
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fn deconstruct_modrm_byte(modrm: u8) -> (u8, u8, u8) {
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let mode = (modrm >> 6) & 0b11;
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let reg = (modrm >> 3) & 0b111;
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let rm = modrm & 0b111;
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(mode, reg, rm)
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}
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/// Parse a single modrm byte, return the resulting MemoryIndex and advance the offset.
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/// Returns the parsed modrm target and the source register
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pub fn parse_modrm_byte(&mut self, width: Operand) -> (ModRmTarget, RegisterId) {
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// advance to operand
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self.offset += 1;
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let modrm = self.text[self.offset];
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self.instruction.raw.push(modrm);
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let (mode, reg, rm) = Self::deconstruct_modrm_byte(modrm);
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log::debug!(
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"0x{:04x} deconstructed into: 0b{:b}, 0b{:b}, 0b{:b}",
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modrm,
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mode,
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reg,
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rm
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);
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let mut displacement = None;
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match mode {
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0b00 => {
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if rm == 0b110 {
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log::debug!("Additional word during ModRM parsing was read with mod 0.");
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displacement = Some(Operand::Word(self.parse_word()));
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} else {
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displacement = None;
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}
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}
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0b01 => {
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log::debug!("Additional byte during ModRM parsing was read.");
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displacement = Some(Operand::Byte(self.parse_byte()))
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}
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0b10 => {
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log::debug!("Additional word during ModRM parsing was read.");
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displacement = Some(Operand::Word(self.parse_word()));
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}
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0b11 => {
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log::debug!("ModRM (0b{:b}) to/from Register (0b{:b})", rm, reg);
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// XXX: find a nicer way instead of using Byte(0) and Word(0)
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let target = match width {
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Operand::Byte(_) => ModRmTarget::Register(Register::by_id(Operand::Byte(rm))),
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Operand::Word(_) => {
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ModRmTarget::Register(Register::by_id(Operand::Word(rm.into())))
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}
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};
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return (target, reg);
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}
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_ => panic!("Invalid ModRM byte encountered"),
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};
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let index = match rm {
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0b0000 => MemoryIndex {
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base: Some(Register::BX),
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index: Some(Register::SI),
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displacement,
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},
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0b0001 => MemoryIndex {
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base: Some(Register::BX),
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index: Some(Register::DI),
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displacement,
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},
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0b0010 => MemoryIndex {
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base: Some(Register::BP),
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index: Some(Register::SI),
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displacement,
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},
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0b0011 => MemoryIndex {
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base: Some(Register::BP),
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index: Some(Register::DI),
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displacement,
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},
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0b0100 => MemoryIndex {
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base: None,
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index: Some(Register::SI),
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displacement,
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},
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0b0101 => MemoryIndex {
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base: None,
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index: Some(Register::DI),
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displacement,
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},
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0b0110 => MemoryIndex {
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base: Some(Register::BP),
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index: None,
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displacement,
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},
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0b0111 => MemoryIndex {
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base: Some(Register::BX),
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index: None,
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displacement,
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},
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_ => panic!("Invalid ModRM byte encountered"),
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};
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(ModRmTarget::Memory(index), reg)
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}
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/// Match the modrm reg bits to the GPR1 mnemonics.
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/// GPR always has an imm value as second operand, but is available in both
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/// Byte and Word length.
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pub fn modrm_reg_to_mnemonic(reg: u8, target: ModRmTarget, imm: Operand) -> Mnemonic {
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match imm {
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Operand::Byte(b) => match reg {
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0b000 => Mnemonic::ADD_Ib(target, b),
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0b001 => Mnemonic::OR_Ib(target, b),
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0b010 => Mnemonic::ADC_Ib(target, b),
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0b011 => Mnemonic::SBB_Ib(target, b),
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0b100 => Mnemonic::AND_Ib(target, b),
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0b101 => Mnemonic::SUB_Ib(target, b),
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0b110 => Mnemonic::XOR_Ib(target, b),
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0b111 => Mnemonic::CMP_Ib(target, b),
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_ => panic!("Illegal GPR1 mnemonic"),
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},
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Operand::Word(w) => match reg {
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0b000 => Mnemonic::ADD_Iv(target, w),
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0b001 => Mnemonic::OR_Iv(target, w),
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0b010 => Mnemonic::ADC_Iv(target, w),
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0b011 => Mnemonic::SBB_Iv(target, w),
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0b100 => Mnemonic::AND_Iv(target, w),
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0b101 => Mnemonic::SUB_Iv(target, w),
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0b110 => Mnemonic::XOR_Iv(target, w),
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0b111 => Mnemonic::CMP_Iv(target, w),
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_ => panic!("Illegal GPR1 mnemonic"),
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},
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}
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}
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/// Decode instructions from the text section of the provided binary
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pub fn decode_instructions(&mut self) -> Result<Vec<Instruction>, DisasmError> {
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// naive approach:
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// 1. read byte
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// 2. pattern match to see which instruction it is
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// 3. read as many bytes as this instruction needs (registers, immidiates, ...)
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// repeat until no bytes left
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let mut instructions = Vec::new();
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while self.offset < self.text.len() {
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self.instruction.start = self.offset;
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let opcode = self.text[self.offset];
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// additional raw bytes will be pushed by parse functions
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self.instruction.raw.push(opcode);
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// XXX: convert this copy and paste horror into a proc macro
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self.instruction.opcode = match opcode {
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0x00 => modrmb!(self, ADD_FromReg),
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0x01 => modrmv!(self, ADD_FromReg),
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0x02 => modrmb!(self, ADD_ToReg),
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0x03 => modrmv!(self, ADD_ToReg),
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0x04 => Mnemonic::ADD_ALIb(self.parse_byte()),
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0x05 => Mnemonic::ADD_AXIv(self.parse_word()),
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0x06 => Mnemonic::PUSH_S(SegmentRegister::ES),
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0x07 => Mnemonic::POP_S(SegmentRegister::ES),
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0x08 => modrmb!(self, OR_FromReg),
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0x09 => modrmv!(self, OR_FromReg),
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0x0A => modrmb!(self, OR_ToReg),
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0x0B => modrmv!(self, OR_ToReg),
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0x0C => Mnemonic::OR_ALIb(self.parse_byte()),
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0x0D => Mnemonic::OR_AXIv(self.parse_word()),
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0x0E => Mnemonic::PUSH_S(SegmentRegister::CS),
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0x0F => panic!("Opcode 0x0F (POP CS) is considered undefined"),
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0x10 => modrmb!(self, ADC_FromReg),
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0x11 => modrmv!(self, ADC_FromReg),
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0x12 => modrmb!(self, ADC_ToReg),
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0x13 => modrmv!(self, ADC_ToReg),
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0x14 => Mnemonic::ADC_ALIb(self.parse_byte()),
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0x15 => Mnemonic::ADC_AXIv(self.parse_word()),
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0x16 => Mnemonic::PUSH_S(SegmentRegister::SS),
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0x17 => Mnemonic::POP_S(SegmentRegister::SS),
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0x18 => modrmb!(self, SBB_FromReg),
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0x19 => modrmv!(self, SBB_FromReg),
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0x1A => modrmb!(self, SBB_ToReg),
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0x1B => modrmv!(self, SBB_ToReg),
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0x1C => Mnemonic::SBB_ALIb(self.parse_byte()),
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0x1D => Mnemonic::SBB_AXIv(self.parse_word()),
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0x1E => Mnemonic::PUSH_S(SegmentRegister::DS),
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0x1F => Mnemonic::POP_S(SegmentRegister::DS),
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0x20 => modrmb!(self, AND_FromReg),
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0x21 => modrmv!(self, AND_FromReg),
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0x22 => modrmb!(self, AND_ToReg),
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0x23 => modrmv!(self, AND_ToReg),
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0x24 => Mnemonic::AND_ALIb(self.parse_byte()),
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0x25 => Mnemonic::AND_AXIv(self.parse_word()),
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0x26 => Mnemonic::OVERRIDE(SegmentRegister::ES),
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0x27 => Mnemonic::DAA,
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0x28 => modrmb!(self, SUB_FromReg),
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0x29 => modrmv!(self, SUB_FromReg),
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0x2A => modrmb!(self, SUB_ToReg),
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0x2B => modrmv!(self, SUB_ToReg),
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0x2C => Mnemonic::SUB_ALIb(self.parse_byte()),
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0x2D => Mnemonic::SUB_AXIv(self.parse_word()),
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0x2E => Mnemonic::OVERRIDE(SegmentRegister::CS),
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0x2F => Mnemonic::DAS,
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0x30 => modrmb!(self, XOR_FromReg),
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0x31 => modrmv!(self, XOR_FromReg),
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0x32 => modrmb!(self, XOR_ToReg),
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0x33 => modrmv!(self, XOR_ToReg),
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0x34 => Mnemonic::XOR_ALIb(self.parse_byte()),
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0x35 => Mnemonic::XOR_AXIv(self.parse_word()),
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0x36 => Mnemonic::OVERRIDE(SegmentRegister::SS),
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0x37 => Mnemonic::AAA,
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0x38 => modrmb!(self, CMP_FromReg),
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0x39 => modrmv!(self, CMP_FromReg),
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0x3A => modrmb!(self, CMP_ToReg),
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0x3B => modrmv!(self, CMP_ToReg),
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0x3C => Mnemonic::CMP_ALIb(self.parse_byte()),
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0x3D => Mnemonic::CMP_AXIv(self.parse_word()),
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0x3E => Mnemonic::OVERRIDE(SegmentRegister::DS),
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0x3F => Mnemonic::AAS,
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0x40 => Mnemonic::INC(Register::AX),
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0x41 => Mnemonic::INC(Register::CX),
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0x42 => Mnemonic::INC(Register::DX),
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0x43 => Mnemonic::INC(Register::BX),
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0x44 => Mnemonic::INC(Register::SP),
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0x45 => Mnemonic::INC(Register::BP),
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0x46 => Mnemonic::INC(Register::SI),
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0x47 => Mnemonic::INC(Register::DI),
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0x48 => Mnemonic::DEC(Register::AX),
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0x49 => Mnemonic::DEC(Register::CX),
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0x4A => Mnemonic::DEC(Register::DX),
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0x4B => Mnemonic::DEC(Register::BX),
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0x4C => Mnemonic::DEC(Register::SP),
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0x4D => Mnemonic::DEC(Register::BP),
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0x4E => Mnemonic::DEC(Register::SI),
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0x4F => Mnemonic::DEC(Register::DI),
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0x50 => Mnemonic::PUSH_R(Register::AX),
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0x51 => Mnemonic::PUSH_R(Register::CX),
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0x52 => Mnemonic::PUSH_R(Register::DX),
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0x53 => Mnemonic::PUSH_R(Register::BX),
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0x54 => Mnemonic::PUSH_R(Register::SP),
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0x55 => Mnemonic::PUSH_R(Register::BP),
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0x56 => Mnemonic::PUSH_R(Register::SI),
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0x57 => Mnemonic::PUSH_R(Register::DI),
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0x58 => Mnemonic::POP_R(Register::AX),
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0x59 => Mnemonic::POP_R(Register::CX),
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0x5A => Mnemonic::POP_R(Register::DX),
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0x5B => Mnemonic::POP_R(Register::BX),
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0x5C => Mnemonic::POP_R(Register::SP),
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0x5D => Mnemonic::POP_R(Register::BP),
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0x5E => Mnemonic::POP_R(Register::SI),
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0x5F => Mnemonic::POP_R(Register::DI),
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0x60..=0x6F => panic!("0x06 to 0x06F is considered undefined."),
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0x70 => Mnemonic::JO(self.parse_byte()),
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0x71 => Mnemonic::JNO(self.parse_byte()),
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0x72 => Mnemonic::JB(self.parse_byte()),
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0x73 => Mnemonic::JNB(self.parse_byte()),
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0x74 => Mnemonic::JZ(self.parse_byte()),
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0x75 => Mnemonic::JNZ(self.parse_byte()),
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0x76 => Mnemonic::JBE(self.parse_byte()),
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0x77 => Mnemonic::JA(self.parse_byte()),
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0x78 => Mnemonic::JS(self.parse_byte()),
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0x79 => Mnemonic::JNS(self.parse_byte()),
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0x7A => Mnemonic::JPE(self.parse_byte()),
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0x7B => Mnemonic::JPO(self.parse_byte()),
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0x7C => Mnemonic::JL(self.parse_byte()),
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0x7D => Mnemonic::JGE(self.parse_byte()),
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0x7E => Mnemonic::JLE(self.parse_byte()),
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0x7F => Mnemonic::JG(self.parse_byte()),
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0x80 => modrmgprb!(self),
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0x81 => modrmgprv!(self),
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0x82 => modrmgprb!(self), // same as 0x80
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0x83 => panic!("Sign extented GPR1 not yet implemented"),
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0x84 => modrmb!(self, TEST),
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0x85 => modrmv!(self, TEST),
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0x86 => modrmb!(self, XHCG),
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0x87 => modrmv!(self, XHCG),
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0x88 => modrmb!(self, MOV_FromReg),
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0x89 => modrmv!(self, MOV_FromReg),
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0x8A => modrmb!(self, MOV_ToReg),
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0x8B => modrmv!(self, MOV_ToReg),
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0x8C => modrms!(self, MOV_FromSReg),
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0x8E => modrms!(self, MOV_ToSReg),
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0x8D => modrmv!(self, LEA),
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0x8F => {
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let target = self.parse_modrm_byte(Operand::Word(0)).0;
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let mem = match target {
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ModRmTarget::Memory(idx) => idx,
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_ => panic!("POP_M instruction given a register to pop into"),
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};
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Mnemonic::POP_M(mem)
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}
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0x90 => Mnemonic::NOP(),
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0x91 => Mnemonic::XCHG_AX(Register::CX),
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0x92 => Mnemonic::XCHG_AX(Register::DX),
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0x93 => Mnemonic::XCHG_AX(Register::BX),
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0x94 => Mnemonic::XCHG_AX(Register::SP),
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0x95 => Mnemonic::XCHG_AX(Register::BP),
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0x96 => Mnemonic::XCHG_AX(Register::SI),
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0x97 => Mnemonic::XCHG_AX(Register::DI),
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0x98 => Mnemonic::CBW,
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0x99 => Mnemonic::CWD,
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0x9A => Mnemonic::CALL(Pointer {
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segment: self.parse_word(),
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offset: self.parse_word(),
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}),
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0x9B => Mnemonic::WAIT,
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0x9C => Mnemonic::PUSHF,
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0x9D => Mnemonic::POPF,
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0x9E => Mnemonic::SAHF,
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0x9F => Mnemonic::LAHF,
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0xCD => Mnemonic::INT(self.parse_byte()),
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0xBB => Mnemonic::MOV_BXIv(self.parse_word()),
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_ => {
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eprintln!("Encountered unknown instruction '0x{:x}'", opcode);
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eprintln!("Offset might be misaligned and data is being interpreted.");
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eprintln!("Existing to avoid further misinterpretation...");
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exit(1);
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}
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};
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|
|
println!("{}", self.instruction);
|
|
instructions.push(self.instruction.clone());
|
|
self.instruction = Instruction::new();
|
|
self.offset += 1;
|
|
}
|
|
|
|
Ok(instructions)
|
|
}
|
|
}
|