marcothms/8086-rs
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fix(disasm): only prepend ptr when modrmtarget is memory

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Marco Thomas
2025-06-10 21:07:28 +09:00
parent 7479021d36
commit a4dc420d60
1 changed files with 72 additions and 18 deletions
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90
src/instructions.rs
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@@ -303,8 +303,14 @@ impl fmt::Display for Mnemonic {
match self {
Self::ADD_FromReg(target, reg) => write!(f, "add {target}, {reg}"),
Self::ADD_ToReg(target, reg) => write!(f, "add {reg}, {target}"),
Self::ADD_Ib(target, byte) => write!(f, "add byte ptr {target}, {byte:#04x}"),
Self::ADD_Iv(target, word) => write!(f, "add word ptr {target}, {word:#04x}"),
Self::ADD_Ib(target, byte) => match target {
ModRmTarget::Memory(_) => write!(f, "add byte ptr {target}, {byte:#04x}"),
ModRmTarget::Register(_) => write!(f, "add byte {target}, {byte:#04x}"),
},
Self::ADD_Iv(target, word) => match target {
ModRmTarget::Memory(_) => write!(f, "add word ptr {target}, {word:#04x}"),
ModRmTarget::Register(_) => write!(f, "add word {target}, {word:#04x}"),
},
Self::ADD_ALIb(byte) => write!(f, "add {}, {byte:#04x}", Register::AL),
Self::ADD_AXIv(word) => write!(f, "add {}, {word:#04x}", Register::AX),
@@ -318,29 +324,53 @@ impl fmt::Display for Mnemonic {
Self::OR_FromReg(target, reg) => write!(f, "or {target}, {reg}"),
Self::OR_ToReg(target, reg) => write!(f, "or {reg}, {target}"),
Self::OR_Ib(target, byte) => write!(f, "or byte ptr {target}, {byte:#04x}"),
Self::OR_Iv(target, word) => write!(f, "or word ptr {target}, {word:#04x}"),
Self::OR_Ib(target, byte) => match target {
ModRmTarget::Memory(_) => write!(f, "or byte ptr {target}, {byte:#04x}"),
ModRmTarget::Register(_) => write!(f, "or byte {target}, {byte:#04x}"),
},
Self::OR_Iv(target, word) => match target {
ModRmTarget::Memory(_) => write!(f, "or word ptr {target}, {word:#04x}"),
ModRmTarget::Register(_) => write!(f, "or word {target}, {word:#04x}"),
},
Self::OR_ALIb(byte) => write!(f, "or {}, {byte:#04x}", Register::AL),
Self::OR_AXIv(word) => write!(f, "or {}, {word:#04x}", Register::AX),
Self::ADC_FromReg(target, reg) => write!(f, "adc {target}, {reg}"),
Self::ADC_ToReg(target, reg) => write!(f, "adc {reg}, {target}"),
Self::ADC_Ib(target, byte) => write!(f, "adc byte ptr {target}, {byte:#04x}"),
Self::ADC_Iv(target, word) => write!(f, "adc word ptr {target}, {word:#04x}"),
Self::ADC_Ib(target, byte) => match target {
ModRmTarget::Memory(_) => write!(f, "adc byte ptr {target}, {byte:#04x}"),
ModRmTarget::Register(_) => write!(f, "adc byte {target}, {byte:#04x}"),
},
Self::ADC_Iv(target, word) => match target {
ModRmTarget::Memory(_) => write!(f, "adc word ptr {target}, {word:#04x}"),
ModRmTarget::Register(_) => write!(f, "adc word {target}, {word:#04x}"),
},
Self::ADC_ALIb(byte) => write!(f, "adc {}, {byte:#04x}", Register::AL),
Self::ADC_AXIv(word) => write!(f, "adc {}, {word:#04x}", Register::AX),
Self::SBB_FromReg(target, reg) => write!(f, "sbb {target}, {reg}"),
Self::SBB_ToReg(target, reg) => write!(f, "sbb {reg}, {target}"),
Self::SBB_Ib(target, byte) => write!(f, "sbb byte ptr {target}, {byte:#04x}"),
Self::SBB_Iv(target, word) => write!(f, "sbb word ptr {target}, {word:#04x}"),
Self::SBB_Ib(target, byte) => match target {
ModRmTarget::Memory(_) => write!(f, "sbb byte ptr {target}, {byte:#04x}"),
ModRmTarget::Register(_) => write!(f, "sbb byte {target}, {byte:#04x}"),
},
Self::SBB_Iv(target, word) => match target {
ModRmTarget::Memory(_) => write!(f, "sbb word ptr {target}, {word:#04x}"),
ModRmTarget::Register(_) => write!(f, "sbb word {target}, {word:#04x}"),
},
Self::SBB_ALIb(byte) => write!(f, "sbb {}, {byte:#04x}", Register::AL),
Self::SBB_AXIv(word) => write!(f, "sbb {}, {word:#04x}", Register::AX),
Self::AND_FromReg(target, reg) => write!(f, "and {target}, {reg}"),
Self::AND_ToReg(target, reg) => write!(f, "and {reg}, {target}"),
Self::AND_Ib(target, byte) => write!(f, "and byte ptr {target}, {byte:#04x}"),
Self::AND_Iv(target, word) => write!(f, "and word ptr {target}, {word:#04x}"),
Self::AND_Ib(target, byte) => match target {
ModRmTarget::Memory(_) => write!(f, "and byte ptr {target}, {byte:#04x}"),
ModRmTarget::Register(_) => write!(f, "and byte {target}, {byte:#04x}"),
},
Self::AND_Iv(target, word) => match target {
ModRmTarget::Memory(_) => write!(f, "and word ptr {target}, {word:#04x}"),
ModRmTarget::Register(_) => write!(f, "and word {target}, {word:#04x}"),
},
Self::AND_ALIb(byte) => write!(f, "and {}, {byte:#04x}", Register::AL),
Self::AND_AXIv(word) => write!(f, "and {}, {word:#04x}", Register::AX),
@@ -353,22 +383,40 @@ impl fmt::Display for Mnemonic {
Self::SUB_FromReg(target, reg) => write!(f, "sub {target}, {reg}"),
Self::SUB_ToReg(target, reg) => write!(f, "sub {reg}, {target}"),
Self::SUB_Ib(target, byte) => write!(f, "sub byte ptr {target}, {byte:#04x}"),
Self::SUB_Iv(target, word) => write!(f, "sub word ptr {target}, {word:#04x}"),
Self::SUB_Ib(target, byte) => match target {
ModRmTarget::Memory(_) => write!(f, "sub byte ptr {target}, {byte:#04x}"),
ModRmTarget::Register(_) => write!(f, "sub byte {target}, {byte:#04x}"),
},
Self::SUB_Iv(target, word) => match target {
ModRmTarget::Memory(_) => write!(f, "sub word ptr {target}, {word:#04x}"),
ModRmTarget::Register(_) => write!(f, "sub word {target}, {word:#04x}"),
},
Self::SUB_ALIb(byte) => write!(f, "sub {}, {byte:#04x}", Register::AL),
Self::SUB_AXIv(word) => write!(f, "sub {}, {word:#04x}", Register::AX),
Self::XOR_FromReg(target, reg) => write!(f, "xor {target}, {reg}"),
Self::XOR_ToReg(target, reg) => write!(f, "xor {reg}, {target}"),
Self::XOR_Ib(target, byte) => write!(f, "xor byte ptr {target}, {byte:#04x}"),
Self::XOR_Iv(target, word) => write!(f, "xor word ptr {target}, {word:#04x}"),
Self::XOR_Ib(target, byte) => match target {
ModRmTarget::Memory(_) => write!(f, "xor byte ptr {target}, {byte:#04x}"),
ModRmTarget::Register(_) => write!(f, "xor byte {target}, {byte:#04x}"),
},
Self::XOR_Iv(target, word) => match target {
ModRmTarget::Memory(_) => write!(f, "xor word ptr {target}, {word:#04x}"),
ModRmTarget::Register(_) => write!(f, "xor word {target}, {word:#04x}"),
},
Self::XOR_ALIb(byte) => write!(f, "xor {}, {byte:#04x}", Register::AL),
Self::XOR_AXIv(word) => write!(f, "xor {}, {word:#04x}", Register::AX),
Self::CMP_FromReg(target, reg) => write!(f, "cmp {target}, {reg}"),
Self::CMP_ToReg(target, reg) => write!(f, "cmp {reg}, {target}"),
Self::CMP_Ib(target, byte) => write!(f, "cmp byte ptr {target}, {byte:#04x}"),
Self::CMP_Iv(target, word) => write!(f, "cmp word ptr {target}, {word:#04x}"),
Self::CMP_Ib(target, byte) => match target {
ModRmTarget::Memory(_) => write!(f, "cmp byte ptr {target}, {byte:#04x}"),
ModRmTarget::Register(_) => write!(f, "cmp byte {target}, {byte:#04x}"),
},
Self::CMP_Iv(target, word) => match target {
ModRmTarget::Memory(_) => write!(f, "cmp word ptr {target}, {word:#04x}"),
ModRmTarget::Register(_) => write!(f, "cmp word {target}, {word:#04x}"),
},
Self::CMP_ALIb(byte) => write!(f, "cmp {}, {byte:#04x}", Register::AL),
Self::CMP_AXIv(word) => write!(f, "cmp {}, {word:#04x}", Register::AX),
@@ -412,8 +460,14 @@ impl fmt::Display for Mnemonic {
Self::MOV_ToReg(target, reg) => write!(f, "mov {reg}, {target}"),
Self::MOV_FromSReg(target, reg) => write!(f, "mov {target}, {reg}"),
Self::MOV_ToSReg(target, reg) => write!(f, "mov {reg}, {target}"),
Self::MOV_Ib(target, byte) => write!(f, "mov byte ptr {target}, {byte:#04x}"),
Self::MOV_Iv(target, word) => write!(f, "mov word ptr {target}, {word:#04x}"),
Self::MOV_Ib(target, byte) => match target {
ModRmTarget::Memory(_) => write!(f, "mov byte ptr {target}, {byte:#04x}"),
ModRmTarget::Register(_) => write!(f, "mov byte {target}, {byte:#04x}"),
},
Self::MOV_Iv(target, word) => match target {
ModRmTarget::Memory(_) => write!(f, "mov word ptr {target}, {word:#04x}"),
ModRmTarget::Register(_) => write!(f, "mov word {target}, {word:#04x}"),
},
Self::MOV_AL0b(byte) => write!(f, "mov {}, {byte:#04x}", Register::AL),
Self::MOV_AX0v(word) => write!(f, "mov {}, {word:#04x}", Register::AX),