marcothms/8086-rs
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chore: move register into own module

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This commit is contained in:
Marco Thomas
2025-05-13 16:23:47 +09:00
parent 3cb3f8d4b1
commit f7446c14b1
4 changed files with 128 additions and 123 deletions
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7
src/disasm.rs
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@@ -2,12 +2,11 @@ use core::fmt;
use std::{fs::File, io::Read, process::exit};
use crate::aout::Aout;
use crate::instructions::{
ImmediateOperand, MemoryIndex, ModRmTarget, RegisterId, SegmentRegister,
};
use crate::instructions::{ImmediateOperand, MemoryIndex, ModRmTarget};
use crate::register::{Register, RegisterId, SegmentRegister};
use crate::{
Args,
instructions::{ImmediateByte, ImmediateWord, Instruction, Mnemonic, Register},
instructions::{Instruction, Mnemonic},
};
use crate::{modrmb, modrmgprb, modrmgprv, modrms, modrmv};

121
src/instructions.rs
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@@ -1,5 +1,7 @@
use core::fmt;
use crate::register::{Register, SegmentRegister};
pub type ImmediateByte = u8;
pub type ImmediateWord = u16;
@@ -186,125 +188,6 @@ impl fmt::Display for Mnemonic {
}
}
#[derive(Debug, Clone)]
#[allow(dead_code)]
/// Registers of a 8086 processor
pub enum Register {
// 8 bit
// low bytes
AL,
CL,
DL,
BL,
// high bytes
AH,
CH,
DH,
BH,
// 16 bit
AX, // accumulator
CX, // counter
DX, // data
BX, // base
SP, // stack pointer
BP, // base pointer
SI, // source index
DI, // base index
}
/// Selector for Register or Segment Register
pub type RegisterId = u8;
#[allow(dead_code)]
impl Register {
/// Find the register corresponding to the 8086 bytecode ID
pub fn by_id(id: ImmediateOperand) -> Self {
match id {
ImmediateOperand::Byte(b) => match b {
0b000 => Self::AL,
0b001 => Self::CL,
0b010 => Self::DL,
0b011 => Self::BL,
0b100 => Self::AH,
0b101 => Self::CH,
0b110 => Self::DH,
0b111 => Self::BH,
_ => panic!("Invalid 8bit register ID encountered"),
},
ImmediateOperand::Word(w) => match w {
0b000 => Self::AX,
0b001 => Self::CX,
0b010 => Self::DX,
0b011 => Self::BX,
0b100 => Self::SP,
0b101 => Self::BP,
0b110 => Self::SI,
0b111 => Self::DI,
_ => panic!("Invalid 16bit register ID encountered"),
},
}
}
}
impl fmt::Display for Register {
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
match self {
Self::AX => write!(f, "ax"),
Self::BX => write!(f, "bx"),
Self::CX => write!(f, "cx"),
Self::DX => write!(f, "dx"),
Self::AH => write!(f, "ah"),
Self::AL => write!(f, "al"),
Self::BL => write!(f, "bl"),
Self::BH => write!(f, "bh"),
Self::CH => write!(f, "ch"),
Self::CL => write!(f, "cl"),
Self::DH => write!(f, "dh"),
Self::DL => write!(f, "dl"),
Self::DI => write!(f, "di"),
Self::SI => write!(f, "si"),
Self::BP => write!(f, "bp"),
Self::SP => write!(f, "sp"),
}
}
}
/// Segment Registers of a 8086 processor
#[derive(Debug, Clone)]
#[allow(dead_code)]
pub enum SegmentRegister {
DS,
ES,
SS,
CS,
}
#[allow(dead_code)]
impl SegmentRegister {
/// Find the SRegister corresponding to the 8086 bytecode ID
pub fn by_id(id: u8) -> Self {
match id {
0x00 => Self::ES,
0x01 => Self::CS,
0x10 => Self::SS,
0x11 => Self::DS,
_ => panic!("Invalid segment register ID encountered"),
}
}
}
impl fmt::Display for SegmentRegister {
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
match self {
Self::DS => write!(f, "ds"),
Self::ES => write!(f, "es"),
Self::SS => write!(f, "ss"),
Self::CS => write!(f, "cs"),
}
}
}
#[derive(Debug, Clone)]
/// ModRM byte can either target a memory location or some register
pub enum ModRmTarget {

1
src/main.rs
View File

@@ -4,6 +4,7 @@ mod aout;
mod disasm;
mod disasm_macros;
mod instructions;
mod register;
#[derive(Subcommand, Debug)]
enum Command {

122
src/register.rs Normal file
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@@ -0,0 +1,122 @@
use core::fmt;
use crate::instructions::ImmediateOperand;
#[derive(Debug, Clone)]
#[allow(dead_code)]
/// Registers of a 8086 processor
pub enum Register {
// 8 bit
// low bytes
AL,
CL,
DL,
BL,
// high bytes
AH,
CH,
DH,
BH,
// 16 bit
AX, // accumulator
CX, // counter
DX, // data
BX, // base
SP, // stack pointer
BP, // base pointer
SI, // source index
DI, // base index
}
/// Selector for Register or Segment Register
pub type RegisterId = u8;
#[allow(dead_code)]
impl Register {
/// Find the register corresponding to the 8086 bytecode ID
pub fn by_id(id: ImmediateOperand) -> Self {
match id {
ImmediateOperand::Byte(b) => match b {
0b000 => Self::AL,
0b001 => Self::CL,
0b010 => Self::DL,
0b011 => Self::BL,
0b100 => Self::AH,
0b101 => Self::CH,
0b110 => Self::DH,
0b111 => Self::BH,
_ => panic!("Invalid 8bit register ID encountered"),
},
ImmediateOperand::Word(w) => match w {
0b000 => Self::AX,
0b001 => Self::CX,
0b010 => Self::DX,
0b011 => Self::BX,
0b100 => Self::SP,
0b101 => Self::BP,
0b110 => Self::SI,
0b111 => Self::DI,
_ => panic!("Invalid 16bit register ID encountered"),
},
}
}
}
impl fmt::Display for Register {
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
match self {
Self::AX => write!(f, "ax"),
Self::BX => write!(f, "bx"),
Self::CX => write!(f, "cx"),
Self::DX => write!(f, "dx"),
Self::AH => write!(f, "ah"),
Self::AL => write!(f, "al"),
Self::BL => write!(f, "bl"),
Self::BH => write!(f, "bh"),
Self::CH => write!(f, "ch"),
Self::CL => write!(f, "cl"),
Self::DH => write!(f, "dh"),
Self::DL => write!(f, "dl"),
Self::DI => write!(f, "di"),
Self::SI => write!(f, "si"),
Self::BP => write!(f, "bp"),
Self::SP => write!(f, "sp"),
}
}
}
/// Segment Registers of a 8086 processor
#[derive(Debug, Clone)]
#[allow(dead_code)]
pub enum SegmentRegister {
DS,
ES,
SS,
CS,
}
#[allow(dead_code)]
impl SegmentRegister {
/// Find the SRegister corresponding to the 8086 bytecode ID
pub fn by_id(id: u8) -> Self {
match id {
0x00 => Self::ES,
0x01 => Self::CS,
0x10 => Self::SS,
0x11 => Self::DS,
_ => panic!("Invalid segment register ID encountered"),
}
}
}
impl fmt::Display for SegmentRegister {
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
match self {
Self::DS => write!(f, "ds"),
Self::ES => write!(f, "es"),
Self::SS => write!(f, "ss"),
Self::CS => write!(f, "cs"),
}
}
}